Processor Microarchitecture and Performance

Lecturer: Dr. Werner Haas

Description

Modern computer systems include high-performance processors which enable computationally demanding applications such as video and audio processing, handling of big data amounts or deep neural networks. Exploiting this performance potential for modern applications, however, is difficult, since increased performance levels could only be achieved by introducing additional complexity into the architecture of computer systems – for example, multiprocessor and multicore systems, multi-level memory hierarchies, and memory models with relaxed consistency. 

This course gives an insight into architectural details of modern processor architecture and their impact on non-functional properties. Whereas performance is the central topic of the course, additional non-functional properties such as energy consumption and security will be discussed. In addition to gaining theoretical insight into modern features of processor and system architecture, the course also discusses the interaction of software and hardware and how to optimize software for given architectural features.

Topics

1. Intro/Recap: stored program arch, ISA, abstraction, iron law of performance
2. Simple pipelining: pipeline hazards, superscalar processing, exception handling
3. Caches: direct mapped, set/fully associative, memory hierarchy
4. Virtual memory: segmentation, paging, TLB, aliases/synonyms, VP/PP caches
5. Out of order execution: register renaming, Tomasulo algorithm, memory disambiguation, load/store queues
6. Branch prediction: branch history, branch targets
7. Symmetric multiprocessing: sequential consistency, cache coherence protocols
8. Virtualisation: processor modes, sensitive instructions, multi-level translation
9. Side channels: cache state, timing sources, resource contention
10. Transient execution attacks: Meltdown, Spectre, Retpoline